TSMC considering advanced chip packaging capacity in Japan

Taiwan's TSMC is looking at building advanced packaging capacity in Japan, according to two sources familiar with the matter, a move that would add momentum to Japan's efforts to reboot its semiconductor industry.

The deliberations are at an early stage, they added, declining to be identified as the information was not public.

One option the chipmaking giant is considering is bringing its chip on wafer on substrate (CoWoS) packaging technology to Japan, according to one of the sources who was briefed on the matter.

CoWoS is a high-precision technology that involves stacking chips on top of each other, boosting processing power while saving space and reducing power consumption.

Currently, all of TSMC's CoWoS capacity is in Taiwan.

No decisions on the scale of or the timeline for a potential investment have been made, the source said.

TSMC, formally known as Taiwan Semiconductor Manufacturing Co, declined to comment.

Demand for advanced semiconductor packaging has surged globally in tandem with the artificial intelligence boom, spurring chipmakers including TSMC, Samsung Electronics and Intel, to boost capacity.

TSMC Chief Executive C.C. Wei said in January that the company plans to double CoWos output this year with further increases slated in 2025.

On Monday, TSMC said it was planning additional advanced packaging capacity in Chiayi in southern Taiwan to respond to strong market demand, without giving details.

Construction of a new Chiayi CoWoS plant is due to start in early May, the island's official Central News Agency quoted Vice Premier Cheng Wen-tsan as saying.

GROWING JAPAN FOOTPRINT

Building capacity for advanced packaging would extend TSMC's growing operations in Japan where it has just built one plant and announced another - both on the southern island of Kyushu, a chipmaking hub.

TSMC is partnering with companies including Sony and Toyota l with total investment in the Japan venture expected to run to more than $20 billion.

The chipmaker also established an advanced packaging research and development centre in Ibaraki prefecture, northeast of Tokyo in 2021.

Japan is seen as well positioned to take a larger role in advanced packaging given that it has leading semiconductor materials and equipment makers, growing investment in chip fabrication capacity and a solid customer base.

Advanced packaging would be welcomed in Japan which can offer the ecosystem to support it, a senior official at Japan's industry ministry said.

TrendForce analyst Joanne Chiao said, however, that if TSMC were to build advanced packaging capacity in Japan, she expected it would be limited in scale.

It was not yet clear how much demand there would be for CoWoS packaging within Japan and most of TSMC's current CoWoS customers are in the United States, she added.

TSMC's plans in Japan thus far have been supported by generous subsidies from the Japanese government which - after losing ground to South Korea and Taiwan - sees semiconductors as vital to its economic security.

That's spurred an influx of investment from a range of chip firms from Taiwan and elsewhere.

Intel is also looking at establishing an advanced packaging research facility in Japan to deepen ties with local chip supply chain companies, two separate sources familiar with the matter said.

Intel declined to comment.

Samsung is setting up an advanced packaging research facility in Yokohama, southwest of Tokyo, with government support.

The South Korean chipmaker is also talking to companies in Japan and elsewhere about procuring materials as it prepares to introduce a packaging Technology used by its rival SK Hynix to catch up in high bandwidth memory chips, Reuters has reported.